555 OSC

Components used

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
**************************************************
C_C1 N1 0 1u IC=0
R_R1 N3 N2 1K Resistor_1d9c8cf9a__R_R1
R_R2 N2 N1 1K Resistor_1d9c8cf9a__R_R2
X_U1 0 N1 N5 N3 NC_1 N1 N2 N3 555
V_V1 N3 0 dc 5 ac 0 0 distof1 0 0 distof2 0 0
E_VP1 VP1 0 N5 0 1

**************************************************
* Models and supporting definitions follow
**************************************************
.model Resistor_1d9c8cf9a__R_R1 r(tc1=0 tc2=0 tnom=27)
.model Resistor_1d9c8cf9a__R_R2 r(tc1=0 tc2=0 tnom=27)
* Generic 555 timer wrapper for CircuitSim.
* User-facing pin order follows the standard 8-pin 555 package:
* 1 GND, 2 TRIG, 3 OUT, 4 RESET, 5 CTRL, 6 THRESH, 7 DISCH, 8 VCC
*
* The underlying TS555M macro-model includes two internal adjustment pins.
* The wrapper keeps those pins internal so schematic users see the canonical
* 8-pin timer interface.

.SUBCKT 555 GND TRIG OUT RESET CTRL THRESH DISCH VCC
    X555_CORE GND TRIG OUT RESET CTRL THRESH DISCH VCC NINIT NADJ TS555M
.ENDS 555

**********
*SRC=TS555M;TS555M;Timers;SGS-Thomson;
*SYM=SGS555
* Standard Linear ICs Macromodels, 1993
* Timer
* 1 NEGATIVE POWER SUPPLY
* 2 TRIGGER
* 3 OUTPUT
* 4 RESET
* 5 CONTROL VOLTAGE
* 6 THRESHOLD
* 7 DISCHARGE
* 8 POSITIVE POWER SUPPLY
* 9 ADJUST & INITIALIZATION
*10 ADJUST
*
.SUBCKT TS555M 1 2 3 4 5 6 7 8 9 10
    *
    .MODEL MPJR  PMOS VTO=0.0  TOX=90E-09 KP=2.0E-02 LEVEL=3
    .MODEL MNJR  NMOS VTO=0.0  TOX=90E-09 KP=2.0E-02 LEVEL=3
    .MODEL MNDIS NMOS VTO=1.0  TOX=80E-09 KP=2.0E-02 LEVEL=3
    .MODEL MDTH D N=0.7 IS=1E-08
    *
    RAA 8 5 1E+5
    RBB 5 27 1E+5
    RCC 27 1 1E+5
    IALIM 8 1 94E-06
    EALIM 24 1 8 1 1
    *  COMPA 1 *
    E1H 24 41 24 4 1
    D1H 32 41 MDTH
    D1B  1 32 MDTH
    I1 6 1 10P
    G1 1 32 5 6 6E-07
    * COMPA 2 *
    E2H 24 42 24 4 1
    D2H 22 42 MDTH
    D2B  1 22 MDTH
    I2 2 1 10P
    G2 1 22 27 2 6E-07
    * R S *
    MPH 31 32 24 24 MPJR W=50U  L=6U
    MNB 31 22  1  1 MNJR W=100U L=6U
    MP1  9 31 24 24 MPJR W=42U  L=6U
    MN1  9 31  1  1 MNJR W=26U L=6U
    MP2 31  9 24 24 MPJR W=10U  L=37U
    MN2 31  9  1  1 MNJR W=9U   L=40U
    * RESET *
    RRST 4 1 1E+12
    * OUTPUT STAGE *
    EOUT 15 1 9 1 1
    ROUT 15 3 100
    RCHOUT 3 1 1E+12
    EMI 10 1 24 1 0.5
    EGRILLE 11 1 24 9 1
    MDIS 13 11 1 1 MNDIS W=4500U  L=6U
    RDIS 13 7 20
    RCHDIS 7 1 1E+12
.ENDS TS555M

**************************************************
* Simulation settings
**************************************************
.tran 10n 1e12 0 10n
.save V(VP1)
.end