555 Missing Pulse Detector

Incoming pulses restart a timing interval; a prolonged gap lets the timer report a missing pulse.

Circuit operation

The gate deliberately suppresses input pulses from 5 to 8 ms. Each received pulse turns Q1 on to discharge CT and also applies a low trigger to the 555. Between pulses, RT charges CT. If a gap is long enough, CT reaches the upper threshold and Present falls.

Expected behavior

$$t_{timeout}\approx1.1R_TC_T$$ $$T_{normal}<t_{timeout}<T_{gap}$$

RT = 150 kΩ and CT = 10 nF give about 1.65 ms timeout, longer than the normal 1 ms pulse interval but shorter than the forced gap. Present returns high when pulses resume. The external reset transistor makes this timer arrangement retriggerable.

Reading the results

The first voltage probe is green and the second is red. Additional voltage traces use distinct colors. Current probes, when present, start with blue and then purple. The chart opens with separate traces on a fixed time window; the table retains the same probe order. Zoom to extents includes the complete schematic.

The saved transient runs for 20.0 ms with a maximum step of 1.00 µs. Compare settled cycles after startup and use time-axis cursors to measure delays or periods.

Try a change

Set RT to 220 kΩ; the missing-pulse timeout increases from about 1.65 ms to 2.42 ms. Restore the saved values after comparing the result.

Model limits

The packaged timer uses supply-relative comparators and a stateful latch with finite output (100 Ω) and discharge (20 Ω) resistance. It models timer behavior, not IC supply current or thermal limits. Timing estimates ignore those resistances, leakage, comparator delay, and component tolerances. The internals example is a functional explanation rather than a transistor-level IC replica. Device mismatch, temperature drift, layout parasitics, breakdown and detailed noise are not represented. The schematic and component properties expose the values used.

Reference: TI 555 timer datasheet.