New Circuit

Components used

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
**************************************************
X_S1 N1 0 N4 TDSW1_1bcd2ff9 OnTime=0.5 OffTime=1
X_S2 N1 0 N5 TDSW1_1bcd2ff9 OnTime=0.5 OffTime=1
X_U1 N4 N5 N3 XOR2 VHIGH=5 VTH=2.5
vV1 N1 0 dc 5 ac 0 0 distof1 0 0 distof2 0 0
APROBE_DP1 [N4] [d_DP1] AMODEL_DP1
APROBE_DP2 [N5] [d_DP2] AMODEL_DP2
APROBE_DP3 [N3] [d_DP3] AMODEL_DP3

**************************************************
* Models and supporting definitions follow
**************************************************
.SUBCKT TDSW1_1bcd2ff9 ON OFF COMMON PARAMS: OnTime=0.5 OffTime=1
    BSTATE STATE 0 V={((OnTime < OffTime) ? ((time > OnTime) ? ((time > OffTime) ? 0 : 1) : 0) : ((time > OffTime) ? ((time > OnTime) ? 1 : 0) : 1))}
    BSTATE_INV STATE_INV 0 V={1-V(STATE)}
    S_ON ON COMMON STATE 0 TDSW1_1bcd2ff9_SW
    S_OFF OFF COMMON STATE_INV 0 TDSW1_1bcd2ff9_SW
    .MODEL TDSW1_1bcd2ff9_SW SW(Ron=10m Roff=1Meg Vt=0.25 Vh=0.2495)
.ENDS TDSW1_1bcd2ff9
* XOR 2-Input gate, ideal behavioral
.subckt XOR2 A B OUT VHIGH=5 VTH=2.5
    BOUT OUT 0 V = {((V(A) > VTH) != (V(B) > VTH)) ? VHIGH : 0}
.ends XOR2
.model AMODEL_DP1 adc_bridge(in_low=0.8 in_high=2)
.model AMODEL_DP2 adc_bridge(in_low=0.8 in_high=2)
.model AMODEL_DP3 adc_bridge(in_low=0.8 in_high=2)

**************************************************
* Simulation settings
**************************************************
.tran 100u 100m 0
.save v(x_S1.state) v(x_S2.state)
.end