Circuito 1 (Copy)
SN
Sneh-Patel
·
Created Oct 21, 2026
·
Updated Oct 21, 2026

Details
Components
4
Schematic
Yes
Simulation
Transient analysis
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Components used
Components used
4 components
NameManufacturerMPNCountType
SPICE netlist
* **************************************************
* Generated from CircuitSim Schematic
**************************************************
C_C2 N4 N6 1u IC=0
R_R1 N3 N4 100 Resistor_1d9c8cf9a__R_R1
R_R2 N2 N3 Resistor_1d9c8cf9a__R_R2
xU1 0 N4 NC_1 NC_2 N6 ADA4177AD_c12b3004
V_V1 N2 0 dc 0 ac 1 0 distof1 0 0 distof2 0 0 sin ( 0 5 100 0 0 0 )
E_VP1 VP1 0 N6 0 1
**************************************************
* Models and supporting definitions follow
**************************************************
.model Resistor_1d9c8cf9a__R_R1 r(tc1=0 tc2=0 tnom=27)
.model Resistor_1d9c8cf9a__R_R2 r(tc1=0 tc2=0 tnom=27)
.subckt ADA4177AD_c12b3004 T0 T1 T2 T3 T4
XADAPTER T0 T1 T2 T3 T4 ADA4177AD_c12b3004_SOURCE
.ENDS ADA4177AD_c12b3004
.MODEL ADA4177AD_c12b3004_NIX NPN (BF=71429,IS=1E-16)
.MODEL ADA4177AD_c12b3004_POUT PNP (BF=200,VAF=50,BR=2,IS=1E-15,RC=10.00)
.MODEL ADA4177AD_c12b3004_NOUT NPN (BF=200,VAF=100,BR=2,IS=1E-15,RC=8)
.MODEL ADA4177AD_c12b3004_DX D(IS=1E-16, RS=5, KF=1E-15)
.MODEL ADA4177AD_c12b3004_DNOISE D(IS=1E-16,RS=0,KF=1.095E-14)
*
*ADA4177 SPICE DMod model Typical values
* Description: Amplifier
* Generic Desc: 30V, BIP, OP, Low Noise, Low THD, Non-RRin, RRout
* Developed by: DB ADSJ/ KF ADGT
* Revision History: draft
* 0.0 (02/2015)
* Copyright 2015 by Analog Devices
*
* Refer to "README.DOC" file for License Statement. Use of this
* model indicates your acceptance of the terms and provisions in
* the License Statement.
*
* Node Assignments
* noninverting input
* || inverting input
* || || positive supply
* || || || negative supply
* || || || || output
* || || || || ||
* || || || || ||
.subckt ADA4177AD_c12b3004_SOURCE 1 2 99 50 45
*
*INPUT STAGE
*
Q1 15 7 60 ADA4177AD_c12b3004_NIX
Q2 6 2 61 ADA4177AD_c12b3004_NIX
IOS 1 2 1.75E-10
I1 5 50 77e-6
EOS 7 1 POLY(4) (14,98) (73,98) (81,98) (70,98) 20E-6 1 1 1 1
ROS 7 1 1E-3; for debugging
RC1 11 15 2.6E4
RC2 11 6 2.6E4
RE1 60 5 0.896E2
RE2 61 5 0.896E2
C1 15 6 4.25E-13
D1 50 9 ADA4177AD_c12b3004_DX
V1 5 9 DC 1.8
D10 99 10 ADA4177AD_c12b3004_DX
V6 10 11 1.3
*
*
* CMRR
*
ECM 13 98 POLY(2) (1,50) (2,50) 0 7.192E-4 7.192E-4
RCM1 13 14 2.15E4
RCM2 14 98 5.31E-3
CCM1 13 14 7.4E-10
*
* PSRR
*
EPSY 72 98 POLY(1) (99,50) -1.683 0.056
CPS3 72 73 1E-6
RPS3 72 73 7.9577E+1
RPS4 73 98 6.5915E-4
*
* EXTRA POLE AND ZERO
*
G1 21 98 (6,15) 26E-6
R1 21 98 9.8E4
R2 21 22 9E6
C2 22 98 1.7614E-12
D3 21 99 ADA4177AD_c12b3004_DX
D4 50 21 ADA4177AD_c12b3004_DX
*
* VOLTAGE NOISE
*
VN1 80 98 0
RN1 80 98 16.45E-3
HN 81 98 VN1 9.3
RN2 81 98 1
*
* FLICKER NOISE
*
D5 69 98 ADA4177AD_c12b3004_DNOISE
VSN 69 98 DC .60551
H1 70 98 VSN 30.85
RN 70 98 1
*
* INTERNAL VOLTAGE REFERENCE
*
EREF 98 0 POLY(2) (99,0) (50,0) 0 .5 .5
GSY 99 50 POLY(1) (99,50) 240E-6 1.7495E-10
*
* GAIN STAGE
*
G2 98 25 (21,98) 1E-6
R5 25 98 9.9E7
CF 45 25 3.59E-12
V4 25 33 0.35
D7 51 33 ADA4177AD_c12b3004_DX
EVN 51 98 POLY(1) (50,99) 0 0.5
V3 32 25 0.35
D6 32 97 ADA4177AD_c12b3004_DX
EVP 97 98 POLY(1) (99,50) 0 0.5
*
* OUTPUT STAGE
*
Q3 45 41 99 ADA4177AD_c12b3004_POUT
Q4 45 43 50 ADA4177AD_c12b3004_NOUT
RB1 40 41 6.25E4
RB2 42 43 6.25E4
EB1 99 40 POLY(1) (98,25) 0.9153 1
EB2 42 50 POLY(1) (25,98) 0.9153 1
*
* MODELS
*
.ENDS ADA4177AD_c12b3004_SOURCE
*$
**************************************************
* Simulation settings
**************************************************
.tran 200u 0.03 0 200u
.save V(VP1)
.endTry this circuit yourself
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