Amp

RO

rodrigoa07t

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Created Aug 19, 2026

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Updated Aug 20, 2026

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SPICE netlist

* Class AB Audio Amplifier CircuitSim Target
.global 0; Defines the ground node globally across the schematic.
Vcc Vcc_node 0 DC 15 ; Creates a positive +15V DC power rail
Vee Vee_node 0 DC -15 ; Creates a negative -15V DC power rail
Vin In_node 0 SINE(0 100m 1k) ;Input signal, generator it delivers a 1kHz sine wave with a 0V DC offset and a peak amplitude of 100mV (100m).

* Input Stage
Rtail tail_node Vee_node 4.7k ; Tail resistor, it provides a rough constant current source to bias the differential transistors.
Q1 col1_node In_node tail_node 2N2222A ; The non-inverting NPN input transistor, its base connects to the audio source
Q2 col2_node Vout tail_node 2N2222A ;The inverting NPN feedback transistor, its base connects to Vout, creating a 100% negative feedback loop
Rload Vcc_node col1_node 2.2k ;Load resistor for Q1, the error signal voltage develops across this resistor.

* VAS Stage
Q3 bias_top col1_node Vcc_node 2N2907A ; A PNP transistor, it amplifies the signal voltage coming from Q1's collector.
Rbias bias_bot Vee_node 1k ;The collector load resistor for Q3. It pulls down on the bias network to allow the signal to swing negative.

* Bias Diodes
D1 bias_top bias_mid 1N4148 
D2 bias_mid bias_bot 1N4148 
;These two silicon diodes create a constant voltage drop of roughly 1.4V between bias_top and bias_bot. This voltage pre-biases the output power transistors just past their turn-on threshold to eliminate crossover distortion.

* Power Output Stage
Q4 Vcc_node bias_top emit1_node TIP41C ; NPN power transistor, it handles the positive half of the audio waveform.
Q5 Vee_node bias_bot emit2_node TIP42C; PNP power transistor, it handles the negative half of the audio waveform.
Re1 emit1_node Vout 0.47 
Re2 emit2_node Vout 0.47 
;Emitter degeneration resistors, they provide thermal stability and prevent thermal runaway in the power transistors.

* Speaker Load
Rspeaker Vout gnd 8 ;An 8Ω resistor modeling a standard audio loudspeaker.

*/ Simulation Settings/*
.tran 0 5m 0 1u
.four 1kHz V(Vout)

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