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Task 2

AS

Aseel-Bedari

·

Created Sep 1, 2026

·

Updated Sep 2, 2026

Schematic preview for Task 2
Details

Components

4


Schematic

Yes


Simulation

Transient analysis


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Components used

Components used
4 components
NameManufacturerMPNCountType

Resistor

Generic

—

2

Official

Capacitor

Generic

—

1

Official

DC Voltage Source

Generic

—

1

Official

Time Delay Switch

Generic

—

1

Official

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
**************************************************
C_C1 N3 0 100n IC=0
R_R1 N5 N1 20
R_R2 N2 0 100K
X_S1 N2 N1 N3 TDSW1_1bcd2ff9 OnTime=0.5 OffTime=1
V_V1 N5 0 dc 10 ac 0 0 distof1 0 0 distof2 0 0
E_VP1 VP1 0 N3 0 1

**************************************************
* Models and supporting definitions follow
**************************************************
.model Resistor_1d9c8cf9a r(tc1=0 tc2=0 tnom=27)
.SUBCKT TDSW1_1bcd2ff9 ON OFF COMMON PARAMS: OnTime=0.5 OffTime=1
    BSTATE STATE 0 V={((OnTime < OffTime) ? ((time > OnTime) ? ((time > OffTime) ? 0 : 1) : 0) : ((time > OffTime) ? ((time > OnTime) ? 1 : 0) : 1))}
    BSTATE_INV STATE_INV 0 V={1-V(STATE)}
    S_ON ON COMMON STATE 0 TDSW1_1bcd2ff9_SW
    S_OFF OFF COMMON STATE_INV 0 TDSW1_1bcd2ff9_SW
    .MODEL TDSW1_1bcd2ff9_SW SW(Ron=10m Roff=1Meg Vt=0.25 Vh=0.2495)
.ENDS TDSW1_1bcd2ff9

**************************************************
* Simulation settings
**************************************************
.tran 100u 100m 0
.save V(VP1) v(x_S1.state)
.end

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