XOR

Components used

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
**************************************************
X_A N4 0 TOGGLEABLE_DIGITAL_CONSTANT state=1 logicLow=0 logicHigh=5
X_B N3 0 TOGGLEABLE_DIGITAL_CONSTANT state=1 logicLow=0 logicHigh=5
R_RLOAD N1 0 10K
X_U1 N4 N3 N1 XOR2 VHIGH=5 VTH=2.5
APROBE_DP1 [N4] [d_DP1] AMODEL_DP1
APROBE_DP2 [N3] [d_DP2] AMODEL_DP2
APROBE_DP4 [N1] [d_DP4] AMODEL_DP4

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* Models and supporting definitions follow
**************************************************
* Toggleable digital constant logic-level source
.subckt TOGGLEABLE_DIGITAL_CONSTANT OUT GND PARAMS: state=0 logicLow=0 logicHigh=5
    BOUT OUT GND V = {logicLow+(logicHigh-logicLow)*state}
.ends TOGGLEABLE_DIGITAL_CONSTANT
* XOR 2-Input gate, ideal behavioral
.subckt XOR2 A B OUT VHIGH=5 VTH=2.5
    BOUT OUT 0 V = {((V(A) > VTH) != (V(B) > VTH)) ? VHIGH : 0}
.ends XOR2
.model AMODEL_DP1 adc_bridge(in_low=3.3 in_high=3.3)
.model AMODEL_DP2 adc_bridge(in_low=3.3 in_high=3.3)
.model AMODEL_DP4 adc_bridge(in_low=3.3 in_high=3.3)

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* Simulation settings
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.op
.save V(N4) V(N3) V(N1)
.end