2SJ74 Gate-Source Transfer Curve

Application

This circuit characterizes the 2SJ74 P-channel JFET with a gate-source transfer sweep. It is useful when choosing a bias point for low-noise input stages, source followers, and current-control applications that depend on the JFET channel current.

Design Context

VDD holds the source at 5 V while RD converts drain current into a measured drain voltage. VGATE is swept from 5 V to 7 V, so the gate moves from 0 V to +2 V relative to the source. That reverse-biases the P-channel gate-source junction more strongly across the sweep while the current probe measures drain current through the load branch. The chart x-axis is the swept VGATE source, so the transfer curve is read directly against gate bias.

Expected Behavior

Id is largest when VGATE is close to VDD, where VGS is near 0 V. As VGATE rises above the source voltage, the channel is pinched toward cutoff and Id falls. Vd follows the load current because the drain current develops a voltage across RD.

Key Values

• Source bias: VDD = 5 V
• Gate sweep: VGATE = 5 V to 7 V in 20 mV steps
• Drain load: RD = 1 kOhm
• Measured signals: Id and Vd

Suggested Experiments

• Narrow the sweep near the cutoff region to inspect the transition in more detail.
• Increase RD to see how the drain voltage swing changes for the same transfer curve.
• Move the source bias and gate sweep together to compare operation at a different common-mode voltage.

Featured Component

The 2SJ74 P-channel JFET is the device under test. This demo focuses on how its gate-source bias controls drain current, which is the main behavior used when biasing JFET input and current-control circuits.