1_1_3 Laden_Entladen_von_C

Components used

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
**************************************************
C_C1 N1 N2 1u IC=0
R_R1 N4 N1 1k temp=27
V_U1 N4 0 PULSE(0 5 0 1n 1n {50*0.01/50} {1/50})
E_VP1 VP1 0 N1 0 1
V_IP1 N2 0 0

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* Models and supporting definitions follow
**************************************************
.model Resistor_1d9c8cf9a r(tc1=0 tc2=0 tnom=27)

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* Simulation settings
**************************************************
.options rshunt=1e12
.tran 400u 40e-3 0 400u
.save V(VP1) I(V_IP1)
.end