Logic Circuit

Components used

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
**************************************************
V_V1 N2 0 dc 5 ac 0 0 distof1 0 0 distof2 0 0
X_X1 N2 0 N3 N2 N2 N4 NC_2 NC_1 NAND2x4
E_VP1 VP1 0 N3 0 1
E_VP2 VP2 0 N4 0 1

**************************************************
* Models and supporting definitions follow
**************************************************
.subckt NAND2x4 A1 B1 Y1 A2 B2 Y2 GND VCC VHIGH=5 VTH=2.5
    X1 A1 B1 Y1 NAND2 VHIGH={VHIGH} VTH={VTH}
    X2 A2 B2 Y2 NAND2 VHIGH={VHIGH} VTH={VTH}

.ends NAND2x4

* NAND 2-Input gate, ideal behavioral
.subckt NAND2 in1 in2 out1 VHIGH=5 VTH=2.5
    BOUT out1 0 V = {(V(in1) > VTH) && (V(in2) > VTH) ? 0 : VHIGH}
.ends NAND2

**************************************************
* Simulation settings
**************************************************
.tran 100u 100m 0
.save V(VP1) V(VP2)
.end