1_2_3_Belasteter_Spannungsteiler_mit_Poti

Components used

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
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* net label +12V joins +12V::component:node-3:B +12V::node:stub-22
* net label -12V joins -12V::component:node-3:A -12V::node:stub-24
R_RL N8 0 14.7K temp=27
R_RLast N12 0 14.7K temp=27
R_Ro N9 N6 7.50k temp=27
R_Rp_A N5 N12 'max(1m,10.0k*25.0/100)'
R_Rp_B N12 N4 'max(1m,10.0k*(100-25.0)/100)'
R_Ru N10 N7 2.50k temp=27
V_U1 N6 0 dc 12 ac 0 0 distof1 0 0 distof2 0 0
V_U2 0 N7 dc 12 ac 0 0 distof1 0 0 distof2 0 0
V_V1 N4 0 dc 12 ac 0 0 distof1 0 0 distof2 0 0
V_V2 0 N5 dc 12 ac 0 0 distof1 0 0 distof2 0 0
E_Ua1 Ua1 0 N12 0 1
E_Ua2 Ua2 0 N8 0 1
V_I1 N11 N9 0
V_I2 N10 N11 0
V_I3 N11 N8 0

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* Models and supporting definitions follow
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.model Resistor_1d9c8cf9a r(tc1=0 tc2=0 tnom=27)

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* Simulation settings
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.options rshunt=1e12
.tran 20u 1e-3 0 20u
.save V(Ua2) V(Ua1) I(V_I1) I(V_I2) I(V_I3)
.end