2_2_2_invertierender_Schmitt-Trigger_Hysterese

FE

feslehrer

·

Created Sep 24, 2026

·

Updated Sep 24, 2026

Schematic preview for 2_2_2_invertierender_Schmitt-Trigger_Hysterese
Details

Components

3


Schematic

Yes


Simulation

DC sweep


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About this circuit

Imported circuit. 5 import warning(s) were generated.

Components used

Components used
3 components
NameManufacturerMPNCountType

DC Voltage Source

Generic

—

4

Official

Resistor

Generic

—

2

Official

Op Amp 5-Pin

Generic

—

1

Official

SPICE netlist

* **************************************************
* Generated from CircuitSim Schematic
**************************************************
* net label +Ub joins +Ub::component:node-1:Vpos net-label-pin:node-2:T0::component:node-2:T0
* net label -Ub joins -Ub::component:node-1:Vneg -Ub::component:node-7:T0
X_OPV N6 N8 N1 N9 N5 Param5TVIRTUAL_5c55ebb8 IOS=20n AVOL=200k BW=100meg SR=1meg CMRR=100 ISC=25m RI=100meg VOS=1m IBS=80n RO=10
R_Rm N6 N5 400k Resistor_1d9c8cf9a__R_Rm temp=27
R_Rq N7 N6 100k Resistor_1d9c8cf9a__R_Rq temp=27
V_Uamax N1 0 dc 13.5 ac 0 0 distof1 0 0 distof2 0 0
V_Uamin N9 0 dc -13.5 ac 0 0 distof1 0 0 distof2 0 0
V_Ue N8 0 dc 5 ac 0 0 distof1 0 0 distof2 0 0
V_Uref N7 0 dc 0 ac 0 0 distof1 0 0 distof2 0 0
E_Ue Ue 0 N8 0 1
E_Ua Ua 0 N5 0 1

**************************************************
* Models and supporting definitions follow
**************************************************
.subckt Param5TVIRTUAL_5c55ebb8 In_p In_n Vpos Vneg Out params: VOS=1m IBS=80n IOS=20n AVOL=200K BW=100M SR=1M CMRR=100 ISC=25m RI=10M RO=10
    +SR=1Meg RO=75 ISC=25m RI=100meg VOS=0.1m IBS=1n IOS=1p
    .param Rp1=1e6
    .param Rs1=1e6
    .param K_Is2a=sqrt(AVOL)/Rs1
    .param K_Is2b=sqrt(AVOL)/Rp1
    .param Cp1={AVOL/(2*3.141592653589793*BW*Rp1)}
    .param CMRR_lin=10**(CMRR/20)

    Rin In_p In_n {RI}
    Bcm 4 3 V = {V(cm)/CMRR_lin}
    Voff In_p 4 {VOS}
    Ibias1 In_p 0 {IBS}
    Ibias2 In_n 0 {IBS}
    Ioffset In_p In_n {IOS/2}

    Rcm1 In_p cm 10meg
    Rcm2 In_n cm 10meg

    BIs1a vref vs2a I = {K_Is2a*(V(3)-V(In_n))}
    Rs1 vs2a vref {Rs1}

    BIs2b vref vs2b I = {K_Is2b*(V(vs2a)-v(vref))}
    Rp1 vs2b vref {Rp1}
    VCp1sense vs2b vs2b_ 0
    Cp1 vs2b_ vref {Cp1}

    D3 vs2b_ 8 Param5TVIRTUAL_5c55ebb8_LimitDiode
    D4 8 vpos Param5TVIRTUAL_5c55ebb8_LimitDiode
    B_SRp 8 vpos I={I(VCp1sense)- (Cp1*SR)}

    D5 10 vs2b_ Param5TVIRTUAL_5c55ebb8_LimitDiode
    D6 Vneg 10 Param5TVIRTUAL_5c55ebb8_LimitDiode
    B_SRn Vneg 10 I={-1*I(VCp1sense)-(Cp1*SR)}

    DVpclip vs2b_ Vpos Param5TVIRTUAL_5c55ebb8_VLimit
    DVnclip Vneg vs2b_ Param5TVIRTUAL_5c55ebb8_VLimit

    Bout vref out_ I={(V(vs2b)-v(vref))/RO}
    Rout vref out_ {RO}
    Voutsense out_ out 0

    D9 out 15 Param5TVIRTUAL_5c55ebb8_LimitDiode
    D10 15 vpos Param5TVIRTUAL_5c55ebb8_LimitDiode
    B_outp 15 vpos I={I(Voutsense)- ISC}

    D11 16 out Param5TVIRTUAL_5c55ebb8_LimitDiode
    D12 vneg 16 Param5TVIRTUAL_5c55ebb8_LimitDiode
    B_outn vneg 16 I={-1*I(Voutsense)-ISC}

    R5 Vpos mid 1000000
    R6 mid Vneg 1000000
    Eref vref 0 mid 0 1

.ends

.MODEL Param5TVIRTUAL_5c55ebb8_LimitDiode D (IS= 1.0e-12)
.MODEL Param5TVIRTUAL_5c55ebb8_VLimit D(n=0.1)
.model Resistor_1d9c8cf9a__R_Rm r(tc1=0 tc2=0 tnom=27)
.model Resistor_1d9c8cf9a__R_Rq r(tc1=0 tc2=0 tnom=27)

**************************************************
* Simulation settings
**************************************************
.options rshunt=1e12
.dc v_ue -20 20 0.1 sequence 20 -20 0.1
.save V(Ua) V(Ue)
.end

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