ADN8830 Mixed-Signal TEC Controller

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Analog

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Analog Devices — ADN8830

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Curated by CircuitSim

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Used in 1 public circuit

ADN8830 Mixed-Signal TEC Controller schematic symbol
Details

Manufacturer

Analog Devices


Part number

ADN8830


Pins

29


Used in

1 circuit


Added

May 2026

About this component

ADN8830 mixed-signal thermoelectric cooler controller macro-model with clock, compensation, external FET driver, and monitor pins.

Pins

Pins
29 pins
NumberNameDescription

1

AVDD

Analog supply input for nondriver controller sections.

2

PVDD

Power driver supply input for the external TEC driver stage.

3

SD

Shutdown control input for the controller macro-model; active low on the physical device.

4

THERMIN

Thermistor feedback input used to sense the controlled temperature.

5

TEMPSET

Target temperature control input voltage for the temperature regulation loop.

6

COMPFB

Feedback summing node for the compensation amplifier network.

7

COMPSWIN

PWM compensation switch input node for the external compensation network.

8

SYNCIN

Synchronization input for external oscillator clock control.

9

FREQ

Frequency programming input for the internal oscillator model.

10

SOFTSTART

Soft-start programming input for startup control.

11

PHASE

Clock phase control input for synchronized controller operation.

12

PGND

Power driver ground return for the external TEC driver stage.

13

AGND

Analog ground reference for the controller macro-model.

14

1.5V

Internal 1.5 V reference node exposed by the MicroCap macro-model.

15

VREF

Reference voltage output generated by the controller macro-model.

16

THERMFAULT

Digital fault output indicating an open or shorted thermistor condition.

17

TEMPLOCK

Digital output indicating that measured temperature is near the target temperature.

18

TEMPCTL

Temperature error amplifier output for the external compensation network.

19

COMPOUT

Compensation amplifier output for the temperature-control loop.

20

COMPSWOUT

PWM compensation switch output node for the external compensation network.

21

OUT_B

Linear output feedback terminal associated with the TEC output B side.

22

N2

External NMOS gate-drive output for the linear output stage.

23

P2

External PMOS gate-drive output for the linear output stage.

24

OUT_A

Output feedback terminal associated with the TEC output A side.

25

P1

External PMOS gate-drive output for the PWM output stage.

26

N1

External NMOS gate-drive output for the PWM output stage.

27

SYNCOUT

Synchronization clock output for driving another controller.

28

COMPOSC

Oscillator compensation node used by the MicroCap clock section.

29

TEMPOUT

Temperature monitor output proportional to the thermistor and target-temperature difference.

Public circuits using this component

Circuits
1 circuit
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