D Flip-Flop
Digital
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Generic
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Curated by CircuitSim
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Used in 26 public circuits
Details
Manufacturer
Generic
Part number
—
Pins
6
Used in
26 circuits
Added
Jul 2026
About this component
Edge-triggered D flip-flop with configurable clock edge, set and reset inputs, and true and complementary outputs.
Parameters
Configuration
3 parameters
NEGATIVE_EDGE_TRIGG_CLOCK
Clock edge
Set to 1 for falling-edge triggering; 0 uses rising-edge triggering.
0
ACTIVE_LOW_SET_AND_RESET
Set/reset polarity
Set to 1 for active-low set and reset inputs; 0 uses active-high set and reset inputs.
0
IC
Initial output state
Initial Q output state: 0 starts low and 1 starts high.
0
Timing
5 parameters
RISE_DELAY
Rise delay
Time to wait before returning an output after the output goes from low to high.
1e-9 s
FALL_DELAY
Fall delay
Time to wait before returning an output after the output goes from high to low.
1e-9 s
CLK_DELAY
Clock delay
Time to wait before accepting a clock signal after the signal arrives.
1e-9 s
SET_DELAY
Set delay
Time to wait before accepting a set signal after the signal arrives.
1e-9 s
RESET_DELAY
Reset delay
Time to wait before accepting a reset signal after the signal arrives.
1e-9 s
Pins
Pins
6 pins
1
CLK
Clock input.
2
D
Data input.
3
Q
True output.
4
RESET
Asynchronous reset input.
5
SET
Asynchronous set input.
6
~Q
Complementary output.
Public circuits using this component
26 total
Circuits
4 circuits
Drop D Flip-Flop into your circuit
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