Inverter Amplifier

Bias a CMOS inverter near its switching point with resistive feedback, then amplify a small AC input.

Circuit operation

RF biases the inverter near its switching point. C1 passes the AC input while blocking its DC level. R1 and RF establish negative feedback, making the inverter a small-signal inverting amplifier rather than a logic switch.

Expected behavior

$$A_v\approx-\frac{R_F}{R_1}=-10$$ $$f_{\mathrm{in}}\approx\frac{1}{2\pi R_1C_1}=15.9\,\mathrm{Hz}$$

A 20 mV peak, 1 kHz input produces an inverted output variation around a roughly 2.5 V bias. Finite transistor gain reduces the ideal gain magnitude. Compare AC variations rather than the absolute DC voltage. Both devices conduct continuously, so this circuit has appreciable quiescent current.

Reading the results

The first voltage probe is green and the second is red. Additional voltage traces use distinct colors. Current probes, when present, start with blue and then purple. The chart opens with separate traces on a fixed time window; the table retains the same probe order. Zoom to extents includes the complete schematic.

The saved transient runs for 6.0 ms with a maximum step of 1.00 µs. Compare settled cycles after startup and use time-axis cursors to measure delays or periods.

Try a change

Set RF to 47 kΩ; the small-signal closed-loop gain decreases. Restore the saved values after comparing the result.

Model limits

These are generic transistor models, not a specific manufactured part. The CMOS models use illustrative threshold, transconductance, junction-capacitance and series-resistance parameters. Device mismatch, temperature drift, layout parasitics, breakdown and detailed noise are not represented. The schematic and component properties expose the values used.