555 Low-Duty-Cycle Oscillator

Separate the capacitor charge and discharge paths to obtain a short high pulse and a long low interval.

Circuit operation

D1 bypasses RB during charging, so RA mainly sets the short high interval. During discharge the diode is reverse biased, forcing capacitor current through RB and producing a longer low interval.

Expected behavior

$$t_L\approx\ln2\,R_BC_T$$ $$D=\frac{t_H}{t_H+t_L}$$

RA = 4.7 kΩ and RB = 47 kΩ make the output high for a small fraction of each cycle. The diode drop means the charge time is longer than the simple ln(2) RA CT estimate; inspect the measured duty ratio instead of assuming an ideal diode.

Reading the results

The first voltage probe is green and the second is red. Additional voltage traces use distinct colors. Current probes, when present, start with blue and then purple. The chart opens with separate traces on a fixed time window; the table retains the same probe order. Zoom to extents includes the complete schematic.

The saved transient runs for 3.0 ms with a maximum step of 0.10 µs. Compare settled cycles after startup and use time-axis cursors to measure delays or periods.

Try a change

Double CT; the oscillation period approximately doubles while the threshold voltages remain unchanged. Restore the saved values after comparing the result.

Model limits

The packaged timer uses supply-relative comparators and a stateful latch with finite output (100 Ω) and discharge (20 Ω) resistance. It models timer behavior, not IC supply current or thermal limits. Timing estimates ignore those resistances, leakage, comparator delay, and component tolerances. The internals example is a functional explanation rather than a transistor-level IC replica. Device mismatch, temperature drift, layout parasitics, breakdown and detailed noise are not represented. The schematic and component properties expose the values used.

Reference: TI 555 timer datasheet.