Synchronous Binary Counter 4-Bit
Digital
·
Generic
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Curated by CircuitSim
Details
Manufacturer
Generic
Part number
—
Pins
12
Used in
No circuits
Added
Sep 2026
About this component
Four-bit synchronous binary up counter with active-high enable, parallel load, and reset. On each rising clock edge the priority is RESET, LOAD, ENABLE/count, then hold.
Parameters
Logic levels
2 parameters
VTH
Input threshold
Voltage at or above which an input is interpreted as logic high.
2.5 V
VHIGH
High output voltage
Voltage driven for a defined logic-high output.
5 V
Timing and state
2 parameters
TPD
Propagation delay
Clock-to-output propagation delay.
1n s
INITIAL_STATE
Initial state
Initial unsigned state represented by Q3..Q0.
0
Pins
Pins
12 pins
1
D0
Parallel-load data bit 0 and least-significant bit.
2
D1
Parallel-load data bit 1.
3
D2
Parallel-load data bit 2.
4
D3
Parallel-load data bit 3 and most-significant bit.
5
LOAD
Active-high synchronous parallel load.
6
ENABLE
Active-high count enable.
7
CLK
Rising-edge clock input.
8
RESET
Active-high synchronous reset; highest priority.
9
Q0
Counter state bit 0 (least significant).
10
Q1
Counter state bit 1.
11
Q2
Counter state bit 2.
12
Q3
Counter state bit 3 (most significant).
Public circuits using this component
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