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555 astable timer calculator

Calculate 555 oscillator frequency, duty cycle and high/low times with a timing waveform.

Configure

Ω

Charging resistance

Ω

Charge and discharge resistance

F

Timing capacitance
Advanced inputs

V

Timer supply voltage

Results update as you type.

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Results

Oscillation frequency138.72 Hz
Settled timing cycles
Voltage (V)00 s2.57.21 ms514.42 ms
OutputCapacitor
High duty cycle54.81 %
High time3.95 ms
Low time3.26 ms
Advanced results
Period7.21 ms
Lower threshold1.67 V
Upper threshold3.33 V

How 555 astable timer works

C1 repeatedly charges through R1 and R2 from one-third to two-thirds of the supply, then discharges through R2. The conventional two-resistor circuit produces a duty cycle above 50%. The graph shows settled cycles; the initial startup pulse is longer. The simulated supply rises over 1 µs at power-on.

f=1ln⁡(2)(R1+2R2)C1f=\frac{1}{\ln(2)(R_1+2R_2)C_1}

Ideal one-third/two-thirds thresholds and negligible discharge resistance. The mapped LM555 circuit uses a behavioral timing model; real component tolerances and output loading can change the result.

Change the form inputs or click a component value on the schematic. Choose Try in CircuitSim to simulate the configured circuit.